Design a signed fixed-point multiplier with rounding.

Module name: fp_mul
Parameters:
  - WIDTH = 24        // Total bit width
  - FRAC  = 8         // Fractional bits

Ports:
  - input  signed [WIDTH-1:0] a
  - input  signed [WIDTH-1:0] b
  - output signed [WIDTH-1:0] product   // Rounded and truncated result
  - output                    overflow  // High when result exceeds representable range

Functional specification:
  - Multiply a and b (both Q(WIDTH-FRAC-1).FRAC signed fixed-point)
  - The full product is 2*WIDTH bits wide; extract the correct WIDTH bits with rounding
  - Round-to-nearest: add 0.5 ULP (1 << (FRAC-1)) to the full product before truncation
  - Saturate on overflow (same as fp_add: clamp to MAX_POS or MIN_NEG)
  - Combinational (no clock)
